This relates to microfabrication including fabrication of semiconductor devices.
Continuous micro-miniaturization of digital semiconductor devices has been the engine for economic growth for past three decades. The number of transistors being fabricated on chips approximately doubles every few years. This micro-miniaturization has continued from planar devices into three dimensional space. Continued scaling, however, has come at a cost. Patterning the progressively smaller dimensions at advanced technology nodes has grown in complexity. Starting with simple direct print using 193 nm dry lithography at relatively larger technology nodes, patterning for advanced nodes has moved into complicated multi-patterning schemes using 193 nm-immersion lithography. Some common multi-patterning techniques employed in industry include double and/or triple litho-etch (LELE or LELELE (LEx)), self-aligned double patterning (SADP), self-aligned quadruple patterning (SAQP), etc.